1. Field of the Invention
This invention relates to a method for the production of semiconductor devices.
2. Description of the Prior Art
The process of producing a semiconductor integrated circuit includes the operation of forming a film on a semiconductor wafer and patterning the film by photolithography at several steps.
For the purpose of forming a plurality of identical semiconductor integrated circuits on one semiconductor wafer, the photolithography adopts the method of step and repeat reduction-type projection printing. The projection printing method utilizes a reticule having a plurality of identical circuit patterns arrayed adjacently thereon, to effect simultaneous exposure of a resist to the plurality of circuit patterns.
The semiconductor wafer, after having these semiconductor integrated circuits formed thereon, is divided into individual chips, each bearing one of the semiconductor integrated circuits.
However, as illustrated in FIG. 1A, since a semiconductor wafer 101 has a circular shape and, one unit circuit pattern forming area on a reticule 102 has a rectangular shape, a certain proportion of the circuit patterns 103a to 103d on the reticule 102 used during the exposure inevitably protrude from the semiconductor wafer 101 during the exposure (the hatched area in the diagram). The circuit patterns 103d which are formed near the circumference of the semiconductor wafer 101 and contain a missing portion will be referred to hereinafter as "rejectable circuit patterns" or "rejectable chips."
Also, as the puddle developing method, inwhich a liquid developer is piled on a semiconductor wafer, is generally adopted as the means to develop an exposed resist, the circumferential region of the semiconductor wafer is insufficiently developed. This inevitably gives rise to abnormally shaped resist patterns.
When the abnormally shaped resist patterns such as this exist near the circumference edge of the semiconductor wafer, films which are patterned using this resist pattern as a mask, are also abnormally shaped. Problems can occur, for example during the formation of storage electrodes on DRAM, when a hydrofluoric acid treatment is done to remove the silicon oxide film from beneath a polycrystalline silicon film, which forms the storage electrode. The polycrystalline silicon that is not connected to the substrate in the abnormally patterned area floats off and becomes attached as a particle in the normal pattern area, forming a factor causing reduced yields.
As a way of removing such abnormal patterns, a method of projecting light onto the whole area destined to produce rejectable chips after the exposure may be adopted as disclosed in JP-A-07142309A. This method, however, is not as effective in preventing the occurrence of abnormal patterns as expected because it produces no change in the fact that the development is insufficient in the area of rejectable chips.
To cope with this problem, a method has been adopted of omitting the projection of the circuit patterns 103a to 103d of the reticule 105 of FIG. 1B at the positions where the circuit patterns overlap the circumference edge of the semiconductor wafer 101, i.e. the position which correspond to the hatched area of FIG. 1A.
However if the exposure to light is omitted from the area in which the circumference edge of the semiconductor wafer overlaps at least one of the circuit patterns on the reticule, a wasted area of a width which covers one to three circuit patterns arises near the circumference edge of the semiconductor wafer. This causes a problem of lowered yield.
The practice of forming only one circuit pattern on a reticule and using this reticule for the purpose of exposure to light is also an option. However, this causes a large increase in the number of shots of light involved during the treatment of exposure to light, and inevitably results in a decrease in the throughput.